The present invention relates, in general, to a coherent light generator and to a particular current control structure.
In an article entitled xe2x80x9cIII-V Compound Semiconductor Native Oxidesxe2x80x94The Newest of the Semiconductor Device Materials,xe2x80x9d published in Compound Semiconductor, January 1997, Russell D. DuPuis chronicled the development of the semiconductor oxide. Mr. DuPuis points out that Carl Frosch, of Bell Telephone Laboratories, disclosed in 1955 that a silicon wafer could be oxidized by exposing it to high temperature (e.g., 1050 degrees Celsius) and water vapor (i.e., steam) in either oxygen or nitrogen to form a layer of silicon dioxide thereon. The oxide, or native oxide, exhibited sufficiently high insulating properties to be used as an insulator in electronic devices manufacture in silicon.
It was widely thought that an insulating oxide could not be grown on Group III-V semiconductor materials with insulating properties as good as silicon dioxide. In 1990, Nick Holonyak, Jr. et al. discovered that such an oxide could be made. The discovery was described in U.S. Pat. No. 5,262,360, entitled xe2x80x9cAlGaAs NATIVE OXIDExe2x80x9d; U.S. Pat. No. 5,373,522, entitled xe2x80x9cSEMICONDUCTOR DEVICES WITH NATIVE ALUMINUM OXIDE REGIONSxe2x80x9d; U.S. Pat. No. 5,696,023, entitled xe2x80x9cMETHOD OF MAKING ALUMINUM GALLIUM ARSENIDE SEMICONDUCTOR DEVICE WITH NATIVE OXIDE LAYERxe2x80x9d; and U.S. Pat. No. 5,567,980, entitled xe2x80x9cNATIVE OXIDE OF AN ALUMINUM-BEARING GROUP III-V SEMICONDUCTOR.xe2x80x9d U.S. Pat. Nos. 5,262,360; 5,373,522; 5,696,023; and 5,567,980 are hereby incorporated by reference into the specification of the present invention. The discovery was also described in an article entitled xe2x80x9cHydrolyzation oxidation of AlxGa1xe2x88x92xAsxe2x80x94AlAsxe2x80x94GaAs quantum well heterostructures and superlattices,xe2x80x9d by J. M. Dallesasse, N. Holonyak, Jr., A. R. Sugg, T. A. Richard, and N. El-Zein, published by the American Institute of Physics in Appl. Phys. Lett., 57, Dec. 24, 1990, pp. 2844-2846. The discovery is, essentially, exposing an aluminum-bearing Group III-V semiconductor material to high temperature (e.g., 375 degrees Celsius) and water vapor in nitrogen until a user-definable portion of the aluminum-bearing Group III-V semiconductor material is oxidized. Partial oxidation is useful in an electronic device for confining current flow to a user-definable path. Complete oxidation is useful in an electronic device for forming an insulator or part of a mirror.
Other relevant prior art includes an article by H. Gebretsadik et al., entitled xe2x80x9cLateral oxidation of InAlAs in InP-based heterostructures for long wavelength vertical cavity surface emitting laser application,xe2x80x9d published by the American Institute of Physics in Appl. Phys. Lett., Jan. 12, 1998, on pp. 135-137, and an article by P. Legay et al., entitled xe2x80x9cOxide confining layer on an InP substrate,xe2x80x9d published by the American Institute of Physics in the Journal of Applied Physics, Vol. 85, No. 4, Feb. 15, 1999. Each article discloses a method of oxidizing a particular Group III-V semiconductor material on an InP substrate.
Most of the prior art methods of forming an oxide in a Group III-V semiconductor material involve the wet thermal oxidation of an AlxGa(1xe2x88x92x)As layer because such methods are repeatable and are very controllable. However, such oxidation methods are limited to high aluminum content Group III-V semiconductor materials such as AlxGa(1xe2x88x92x)As lattice matched to GaAs. Lattices are matched to avoid introducing any strain in the resulting structure which might reduce the reliability of the structure. Devices based on such materials are too slow and at the wrong wavelength for use in a fiber optic communication system. However, devices based on Group III-V semiconductor materials lattice matched to Indium Phosphide (InP) are fast enough and at the correct wavelength (i.e., 1.2 um to 1.6 um) for use in a fiber optic communication system. Unfortunately, the only high aluminum containing Group III-V semiconductor materials that are lattice matched to InP are AlAsxSb(1xe2x88x92x) materials with an x value near 0.5. During the oxidation process, the metallic elements (e.g., As and Sb) separate and forms conductive interfacial layers which lead to increased strain in the oxidized structure. The strain may reduce the reliability of the structure.
There is no x value for which AlxGa(1xe2x88x92x)As is lattice matched to InP. AlyIn(1xe2x88x92y)As materials are more suitable but are only lattice matched to InP for y values near 0.48, which is a relatively low aluminum content for oxidation purposes. Therefore, present oxidation methods are not easily transferred to devices based on InP substrates. The maximum aluminum composition of an arsenide-based ternary material that is lattice matched to InP is Al0.48In0.52As. Because of the relatively small aluminum content, the oxidation rate in this material is very slow (xcx9c1 um/hour at 500 degrees Celsius).
It is an object of the present invention to form a vertical cavity surface emitting (VCSEL) laser using reflective mirrors, where each reflecting mirror includes a Group III-V semiconductor material on a totally oxidized at least one strain-compensated superlattice of Group III-V semiconductor material that does not require lattice matching to a Group III-V semiconductor material, and a selectively oxidized at least one strain-compensated superlattice of Group III-V semiconductor material.
It is another object of the present invention to form a VCSEL using a totally and selectively oxidized at least one strain-compensated superlattices of Group III-V semiconductor material that were oxidized in a timely manner and are compatible with standard Group III-V semiconductor device production methods so that the devices made therewith are not degraded during the oxidation process.
The present invention is a VCSEL that includes a Group III-V semiconductor material substrate; a first Distributed Bragg Reflector mirror (DBR); a first Group III-V semiconductor material layer; a first contact; a selectively oxidized at least one strain-compensated superlattice of Group III-V semiconductor material; a second Group III-V semiconductor material layer; a second contact; and a second DBR as defined above.
The first DBR and the second DBR each includes at least seven pairs of layers, where each layer in a pair of layers has a different index of refraction, where one of the layers in a pair is a Group III-V semiconductor material, and where the other layer in a pair is a completely oxidized at least one strain-compensated superlattice of Group III-V semiconductor material, where each at least one strain-compensated superlattice includes at least two monolayers of a Group III-V semiconductor material and at least two monolayers of an aluminum-bearing Group III-V semiconductor material.
The selectively oxidized at least one strain-compensated superlattice of Group III-V semiconductor material includes at least two monolayers of a Group III-V semiconductor material and at least two monolayers of an aluminum-bearing Group III-V semiconductor material.
In the preferred embodiment, the Group III-V semiconductor material substrate is InP of any type (i.e., n-type or p-type); one of the layers in each of the at least seven pairs of layers in the first DBR and the second DBR is comprised of InP; the other layer in each of the at least seven pairs of layers in the first DBR and the second DBR is comprised of a completely oxidized at least one strain-compensated superlattice of InAs/AlAs, where each at least one superlattice of InAs/AlAs includes at least two monolayers of InAs and at least two monolayers of AlAs; the first Group III-V semiconductor material layer is n-type InP; the first contact is an n-type contact; the selectively oxidized at least one strain-compensated superlattice of Group III-V semiconductor material is a selectively oxidized at least one strain-compensated superlattice of InAs/AlAs, where each at least one superlattice of InAs/AlAs includes at least two monolayers of InAs and at least two monolayers of AlAs; the second Group III-V semiconductor material layer is p-type InP; and the second contact is a p-type contact.